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Magnetic Domain Racetrack Memory
Magnetic Domain Racetrack Memory
There is little doubt that computers are becoming more and more important and integrated to modern-day life. Indeed it is almost inconceivable to think about how our society would function if our technological advancement were suddenly brought back to the days of
Every day we encounter and make use of a plethora of devices invented to make living our lives that much easier (or lazier), without a second thought as to the brilliance of the inventions or advancements of the technological marvels within them. Gone are the days when one could powernap in between pages loading on the internet. The various capabilities (from memory capacity to processing speed) of all manner of digital electronic devices, which is largely based on the number of transistors that can be placed in an integrated circuit, have improved with a trend that was first identified by computing giant Intel’s co-founder Gordon E. Moore, and has since become known as Moore’s Law. The law describes the exponentially increasing number of transistors that can be held on an integrated circuit, which appear to double approximately every two years. It is a very interesting thought when one realizes that the tiny mobile phone held within one’s hand contains more power than the huge room-size computers utilized by NASA during the time they put a man on the moon.
Presently, there are two main favoured methods of memory storage – Random Access Memory (RAM) and Hard Disk Drive (HDD), both relied on heavily in modern day computers. HDD is a form of non-volatile memory (NVM), meaning that it can retain the information stored even when not powered. The data is digitally encoded on rapidly rotating platters of with magnetic surfaces, the material being magnetized directionally to represent either 0 or 1 in binary digits. RAM, a form of volatile memory (VM), takes the form of integrated circuits, allowing any piece of data (thus giving rise to the word “random”) to be accessed in any order at a constant time. As a class of VM, RAM does not retain memory after power is switched off. An exception to this would be Flash memory, which is classified as a class of RAM, but is also NVM. However, Flash is both very slow and has a limited endurance due to it’s resistance to block erasure (i.e. can provide random-access read and programming operations but cannot offer random-access rewrite or erasure) and its finite number of these erase-write cycles. These traits mean that while applications and documents are usually run on RAM, they are normally stored on HDD. Whilst both types of memory continue to evolve at a rapid place, the many moving parts of HDD make it more prone to mechanical failure and gives it access times much slower than other formats of digital data storage, such as solid-state RAM, which has no moving parts.1, 2
Enter Racetrack Memory (RM), a new innovative and experimental type of NVM solid-state digital data storage method never before considered. As opposed to the two-dimensional (2D) arrays of transistors and magnetic platters of RAM and HHD respectively, RM forays into the new world of 3D digital data storage, hence potentially offering storage density higher than other types of comparable solid-state memory devices. With no moving parts to wear out like HDD, yet being non-volatile unlike RAM, RM combines both the high-speed and reliability of RAM, and the inexpensiveness and permanence of HDD – essentially the best of both worlds.3
RM works utilizing both the idea of magnetic domains, and Spintronics. A magnetic domain describes a region within ferromagnetic materials which possess uniform magnetization; the individual magnetic moments of the atoms within being aligned with one another. Magnetic domain walls are interfaces separating magnetic domains, and a transition between areas of different magnetic moments. Spintronics, also referred to as magnetoelectronics, is an emerging technology which exploits the intrinsic spin (a fundamental property of atomic nuclei, hadrons, and elementary particles in quantum mechanics) of particles, in this case electrons.4, 5, 6
Figure 1. Diagram of a Racetrack Memory device. [7]
The basics of Racetrack Memory work as follows. A column of magnetic material, essentially a magnetic nanowire arranged to stand perpendicularly on the surface of a silicon wafer, takes the role of the “racetrack” in question. Along the nanowire, there are polarized regions i.e. domains, magnetized to point in either of two opposing directions (up or down). The boundary between these regions is the magnetic domain wall, and these are moved in either direction along the nanowire by applying a tiny pulse of spin-polarized current to either end of the wire. When the electrons come into contact with a domain wall, it moves along the nanowire. (See Figure 7 above)
It is important to note that it is not the atoms themselves that are being moved along the wire, but merely the magnetic orientations (and thus the domain walls), shuffling the data contained in a manner akin to how train carriages are shunted around a track. The data could then be written at the bottom of the nanowire by a “write” device, before a change in the direction of the current causes the domain walls to move back in the opposite direction and allowing the data to be “read” by other element at the bottom of the nanowire.7
Diving into the various aspects of Racetrack Memory in more detail, we must first consider the wire itself. A thin vertical U-shaped ferromagnetic nanoscopic permalloy wire roughly 200nm long and 100nm in diameter acts as the racetrack.3 It is oriented and shaped vertically simply because it would offer the highest storage density, making this a truly 3D device where all previous classes of memory storage devices were 2D.
Uniform magnetic fields alone cannot be used to shift the series of domain walls, as neighbouring domain walls would move in opposite directions, eventually annihilating each other. Thus, the type of current sent into the nanowire itself must be considered. Spin-polarized current – a flow of electrons all spinning in one direction – is passed into ether end of the nanowire. As the domains are magnetized in opposite directions (up or down) along this racetrack via “write” heads, each domain possesses either a head (i.e. a positive/north pole) or a tail (i.e. a negative/south pole), with successive domain walls along the racetrack alternating between head-to-head and tail-to-tail configurations.8 The nanosecond pulses of spin-polarized current move the entire pattern of domain walls along the nanowire past “read” and “write” elements by exploiting the phenomenon of spin-momentum transfer, in which the spin angular momentum of the carriers (electrons in this case) are transferred from one location to another. The act of the spin-coherent current passing into the ferromagnetic nanowire causes it to deposit some of its spin angular momentum, thereby resulting in a large torque being applied to the magnetization.8, 9
Non-magnetic inclusions in the volume of a ferromagnetic material, or dislocations in the cryptographic structure, can cause what in known as “pinning” of the domain walls; such pinning sites cause the domain wall to “seat” in local energy minimum.6 The spacing betweens consecutive domain walls in the nanowire, i.e. the length of the “bit”, is controlled by these pinning sites, which are fabricated along the length of the racetrack. Aside from defining the bit length, these pinning sites also make the domain walls easier to control and give them the added stability they require to resist external physical perturbations, such as thermal fluctuations or stray magnetic fields from nearby racetracks. As a result, an external field is required to “unpin” the domain wall from its pinned location.8, 10 (See Figure 2 below)
Figure 2. Schematic diagram representation of domain wall unpinning. [6]
The speed at which Racetrack Memory can work will depend largely on the maximum domain wall velocity as a parameter. The added energy these domain walls require to be unpinned results in the domain walls remaining stationary until a critical current threshold is exceeded.8 Two regimes have been discovered for current-driven depinning of the domain walls: When considering field-like behaviour, critical current appears to depend upon field and pinning strength; current-driven depinning however seems to suggest that critical current is essentially independent of field and pinning strength.11 In non-adiabatic spin-torque field-driven domain wall motion (precessional), for an ideal racetrack without defects or roughness, domains walls would move for any non-zero field applied, albeit with very low velocity. Non-zero values of the propagation field are hence directly related to the defects, which are in fact local pinning sites for he domain walls. Propagation field is thus proportional to the pinning strength, which can be tuned physically by altering the depth of the notches acting as the dislocations in the nanowire, with no motion occurring below the critical current and turbulent motion occurring above it, resulting in high domain wall velocities.8, 11 The concept of the spin-transfer torque however suggests that for current-induced domain wall motion, there exists an intrinsic critical current density, even for an ideally smooth nanowire. For currents smaller than the threshold value, the domain walls only propagate a short distance before halting due to reaching a dynamical equilibrium, in which case the spin angular moment imparted is compensated by damping. It follows then that for adiabatic spin-torque, which is comparable to a damping term (dissipative), critical current is independent of pinning strength, the exception being for very strong pinning, and hence depends only upon the geometry of the racetrack itself and the material parameters. The recent discovery of another additional non-adiabatic term has shown to make the critical current extrinsic, i.e. scales with the pinning strength. While the origins of this term is still under debate, it is nevertheless extremely relevant and important as its effects suggest that the critical current could be controlled via the fabrication of pinning sites along the nanowire racetrack.8
While suitably spaced pinning sites, as mentioned earlier, are needed to stabilize the racetrack and establish bit length values, a major drawback is that the threshold current densities needed to move the domain walls may be high enough that the nanowire temperature may be subject to drastic increase due to severe Joule heating (A.K.A. ohmic/resistive heating – the process by which the passage of an electric current through a conductor produces heat from interactions between moving particles and from the current and the atomic atoms that make up the conductor) from the current pulses. As a consequence of the exceedingly low heat capacity of the nanowire, its equilibrium temperature is reached in tremendously small timescales of ~2-20ns.
One possible solution for lowering the critical current density of pinned domain walls utilizes short pulses of spin-coherent current with particular lengths matched to the innate precessional frequency of the pinned domain wall. Similar to a physical mechanical oscillator, a domain wall may be described in as if it possessed a mass – that is, a domain wall confined in a potential well will resonate at a natural frequency when subjected to an excitation. The position of the domain walls within the potential well, along with its energy, undergoes damped oscillations upon the application of a small current; eventually they reach a stationary state but with an increased energy that is proportional to the current. When the current is turned off, the domain wall oscillates towards its original equilibrium position at the bottom of the pinning potential; the trajectories of the domain wall during and after excitation being strongly based on the duration of the current excitation. The domain wall could have adequate energy to be driven out of the pinning site if the current pulse length is matched to approximately half an integer of the precessional period. An analogy would be pushing a child on a swing, where you only apply force once the child has started moving forward again i.e. half the total period.8, 12
Overall, Racetrack Memory is a new, boundary-pushing idea which puts the most recent and advanced discoveries and concepts into real use; the forays and pushes into the development of Magnetic Racetrack Memory itself is pioneering new discoveries in the field of electromagnetism. Despite all the advancements however, there is still a long way to go before researchers will be able to construct a working prototype. On the assumption that this concept succeeds however, it would herald another new era in the age of computing which would see devices which are many times more faster, reliable, with a higher memory capacity, and more efficient energy consumption than today’s semiconductors.
References
[1] http://en.wikipedia.org/wiki/Hard_disk_drives
[2] http://en.wikipedia.org/wiki/RAM
[3] http://en.wikipedia.org/wiki/Racetrack_memory
[4] http://en.wikipedia.org/wiki/Spintronics
[5] http://en.wikipedia.org/wiki/Magnetic_domains
[6] http://en.wikipedia.org/wiki/Domain_wall
[7] http://news.bbc.co.uk/2/hi/technology/6935638.stm
[8] Stuart S. P. Parkin, Masamitsu Hayashi, Luc Thomas, Magnetic Domain-Wall Racetrack Memory
[9] http://en.wikipedia.org/wiki/Spin_transfer
[10] http://en.wikipedia.org/wiki/Pinning
[11] Stuart Parkin (IBM Fellow), 2005 IBM Corporation, Magnetic Racetrack Memory: Current Induced Domain Wall Motion! (Adobe Reader presentation)
[12] Luc Thomas, Masamitsu Hayashi, Xin Jiang, Rai Moriya, Charles Rettner, Stuart Parkin, Resonant Amplification of Magnetic Domain-Wall Motion by a Train of Current Pulses